Computer memory, like other integrated circuit (IC) devices, is getting faster, more cost-efficient, and more powerful. Dynamic Random Access Memory (DRAM) is a type of computer memory that stores information in memory cells, which typically comprise a transistor latched to a capacitor.
The critical dimension (CD) is the dimension of the smallest geometrical features (width of interconnect line, contacts, trenches, etc.) which can be formed during semiconductor device manufacturing. Critical dimensions are shrinking in order to facilitate, the formation of smaller components and faster, more efficient circuits. However, adjusting the CD and providing proper patterning for underlying substrates can be difficult when using only a photoresist soft mask.
Line edge roughness (LER) has tended to be one product of decreasing critical dimensions. Poor line edge roughness can lead to poor performance of the eventual device. LER is a measurement of the unwanted edges and bumps on a resist feature. As CDs continue to shrink, the roughness as a percentage of the feature size becomes far greater due to the smaller feature size. According to the 2001 International Technology Roadmap for Semiconductors (ITRS) the roughness that can be tolerated for a 70-65 nm line is only around 3 nm, which is difficult to achieve using current technology. Thus, there is a need to reduce LER and to reliably reduce CD of integrated circuits.